Currently we unconditionally send SGIs to all cores on SMP bringup.
Those SGIs (software generated interrupts) are to push a secondary core
through a gate in the Xen bring up code to filter the right CPU. This gate is
necessary on platforms which do not allow us to wake up a specific secondary
processor and will trap all but the CPU we are trying to wake up.
With PSCI we can explicitly specify the core to startup, so we don't need the
kick here because the CPU will fall straight through Xen's gate.
So we move the GIC kick into a function and call it explicitly from the
platforms that need it. This gets us get rid of the empty cpu_up() platform
functions in ARM32 and the comment in there.
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
[ ijc -- explain more about the Xen gate in the commit message ]
sev();
- return 0;
+ return cpu_up_send_sgi(cpu);
}
static void __init smp_spin_table_init(int cpu, struct dt_device_node *dn)
if ( platform && platform->cpu_up )
return platform->cpu_up(cpu);
- return -EAGAIN;
+ return -ENODEV;
}
int __init platform_smp_init(void)
return 0;
}
-static int __init exynos5_cpu_up(int cpu)
-{
- /* Nothing to do here, the generic sev() will suffice to kick CPUs
- * out of either the firmware or our own smp_up_cpu gate,
- * depending on where they have ended up. */
-
- return 0;
-}
-
static void exynos5_reset(void)
{
void __iomem *pmu;
.init_time = exynos5_init_time,
.specific_mapping = exynos5_specific_mapping,
.smp_init = exynos5_smp_init,
- .cpu_up = exynos5_cpu_up,
+ .cpu_up = cpu_up_send_sgi,
.reset = exynos5_reset,
.blacklist_dev = exynos5_blacklist_dev,
PLATFORM_END
return 0;
}
-static int __init omap5_cpu_up(int cpu)
-{
- /* Nothing to do here, the generic sev() will suffice to kick CPUs
- * out of either the firmware or our own smp_up_cpu gate,
- * depending on where they have ended up. */
-
- return 0;
-}
-
static const char const *omap5_dt_compat[] __initconst =
{
"ti,omap5",
.init_time = omap5_init_time,
.specific_mapping = omap5_specific_mapping,
.smp_init = omap5_smp_init,
- .cpu_up = omap5_cpu_up,
+ .cpu_up = cpu_up_send_sgi,
PLATFORM_END
/*
return 0;
}
-static int __init vexpress_cpu_up(int cpu)
-{
- /* Nothing to do here, the generic sev() will suffice to kick CPUs
- * out of either the firmware or our own smp_up_cpu gate,
- * depending on where they have ended up. */
-
- return 0;
-}
#endif
static const char * const vexpress_dt_compat[] __initconst =
.compatible = vexpress_dt_compat,
#ifdef CONFIG_ARM_32
.smp_init = vexpress_smp_init,
- .cpu_up = vexpress_cpu_up,
+ .cpu_up = cpu_up_send_sgi,
#endif
.reset = vexpress_reset,
.blacklist_dev = vexpress_blacklist_dev,
wfi();
}
+int __init cpu_up_send_sgi(int cpu)
+{
+ /* We don't know the GIC ID of the CPU until it has woken up, so just
+ * signal everyone and rely on our own smp_up_cpu gate to ensure only
+ * the one we want gets through. */
+ send_SGI_allbutself(GIC_SGI_EVENT_CHECK);
+
+ return 0;
+}
+
/* Bring up a remote CPU */
int __cpu_up(unsigned int cpu)
{
return rc;
}
- /* We don't know the GIC ID of the CPU until it has woken up, so just signal
- * everyone and rely on our own smp_up_cpu gate to ensure only the one we
- * want gets through. */
- send_SGI_allbutself(GIC_SGI_EVENT_CHECK);
-
while ( !cpu_online(cpu) )
{
cpu_relax();
extern int arch_cpu_init(int cpu, struct dt_device_node *dn);
extern int arch_cpu_up(int cpu);
+int cpu_up_send_sgi(int cpu);
+
/* Secondary CPU entry point */
extern void init_secondary(void);